1. Field of the Invention
The present invention is generally in the field of fabrication of electronic circuit components. In particular, the present invention is in the field of fabrication of inductors used to build transformers used in electronic circuits.
2. Background Art
It is known in the art that there is an ever-present demand for decreasing electronic circuit component sizes and geometries. The demand is fueled, in large part, by the consumer"" desire for ever-smaller portable communication and information processing devices, such as cellular telephones, hand-held wireless information assistants, laptop computers, and networking devices. The requirement to decrease the size of these consumer communication and information processing devices has resulted, among other things, in a general trend in the market to integrate everything on a chipxe2x80x94to have systems on a chip. In addition to the size reduction obtained with a system on a chip, there is also a manufacturing cost reduction. These systems on a chip have resulted in Ultra Large Scale Integration (ULSI) chips containing over a million components per chip. However, the transformer, an off-chip electronic component, has not benefited from this dramatic decrease in size. Attempts in the art to realize an on-chip transformer encounter various problems, such as size, unwanted capacitance, low quality factor, low self-resonance frequency, and low coefficient of coupling of the transformer""s cross-coupled inductors. These problems become more severe as the operating frequency of the transformer increases. For example, these problems greatly hinder the design of transformers for use in RF applications in the commercially important wireless communication range of 800 to 2400 MHz.
The problems mentioned above that are encountered in the art in an attempt to realize an on-chip transformer will be illustrated by reference to an exemplary transformer shown in top view 100 in FIG. 1A and in cross-sectional view 122 in FIG. 1B.
FIG. 1A shows a top view 100 of an exemplary transformer on an area of a semiconductor die. A first inductor is also referred to as primary winding 104 in FIGS. 1A and 1B. A second inductor is also referred to as secondary winding 106 in FIGS. 1A and 1B. For illustration purposes, primary winding 104 and secondary winding 106 of the exemplary transformer shown in FIGS. 1A and 1B are patterned in a manner known in the art in metal level one. However primary winding 104 and secondary winding 106 can be implemented at any metal level in the semiconductor die. The distance between adjacent segments of primary winding 104 and secondary winding 106 is referred to by numeral 108 in FIG. 1A. The diameter of primary winding 104 is referred to by numeral 118 in FIG. 1A.
FIG. 1B shows cross-sectional view 122 of the exemplary transformer along the line Bxe2x80x94B in FIG. 1A. The width of a segment of primary winding 104 is referred to by numeral 114 while the width of a segment of secondary winding 106 is referred to by numeral 124. Thickness 110 refers to the thickness of primary winding 104 and secondary winding 106. Dielectric 120 having thickness 112 is situated between the lower surface of primary winding 104 (or the lower surface of second winding 106) and silicon substrate 116.
By way of background, a transformer is comprised essentially of two cross-coupled inductors. The magnetic coupling between the two inductors is called mutual inductance. The quality factor (xe2x80x9cQxe2x80x9d) of an inductor is determined by the formula Q=2xcfx80fL/R, where L is the inductance of the inductor, f is the operating frequency of the inductor, and R is the resistance of the inductor. A relatively low quality factor signifies a relatively high energy loss. Therefore, by increasing the respective quality factors of a transformer""s cross-coupled inductors, the energy loss in the transformer can be decreased. Consequently, increasing the inductance of the transformer""s inductors will decrease the energy loss in a transformer. Also, decreasing the resistance of the transformer""s inductors can also decrease the energy loss in a transformer.
Each of the primary or secondary windings in the exemplary transformer shown in FIGS. 1A and 1B is analogous to a xe2x80x9csquare spiral inductorxe2x80x9d known in the art. The problems encountered when attempting to increase the inductance of the primary winding or secondary winding of the exemplary transformer shown in FIGS. 1A and 1B are thus analogous to the is problems encountered in increasing the inductance of a square spiral inductor. For example, typical inductor values for a square spiral inductor used in mixed signal circuits and in RF applications range from 1 to 100 nano-henrys. To achieve a square spiral inductor having a value of 30 nano-henrys using a fabrication process with a metal pitch of 5.0 microns, the inductor would require approximately 17 xe2x80x9cmetal turnsxe2x80x9d and would have a xe2x80x9cdiameterxe2x80x9d of approximately 217 microns. As such, even a 30 nano-henry conventional on-chip inductor would require a considerable amount of die space.
Moreover, for a given diameter 118, the inductance is proportional to n2, where n is the number of xe2x80x9cmetal turnsxe2x80x9d of primary winding 104. Therefore, increasing the number of xe2x80x9cmetal turnsxe2x80x9d of primary winding 104 can increase the inductance of primary winding 104. However, as the number of xe2x80x9cmetal turnsxe2x80x9d increases, the overall resistance of primary winding 104 will also increase. As stated above, the quality factor of an inductor is inversely proportional to the inductor""s resistance. Thus, the increase in the overall resistance of the inductor, for example primary winding 104, will decrease the quality factor of the inductor. As also explained above, a decrease in the quality factor of an inductor results in a greater energy loss in the inductor. Therefore, if primary winding 104 were cross-coupled to another similar on-chip inductor, for example to secondary winding 106, the resulting transformer would suffer a corresponding energy loss.
It is known in the art that the self-resonance frequency of an inductor is inversely related to the capacitance of the inductor. It is also known in the art that the self-resonance frequency of an inductor should be greater than twice the operating frequency of the inductor for optimal operation. As such, optimal functioning of the inductor requires that the inductor have a low inherent capacitance value. Moreover, the need to reduce the inductor""s capacitance increases as the operating frequency of the inductor increases. As such, the inductor""s capacitance becomes a limiting factor in the use of on-chip inductors and consequently on-chip transformers, at relatively high frequencies, such as 800 to 2400 MHz.
It is known in the art that the capacitance of an inductor that is patterned into a metal level of a semiconductor die is proportional to (l*w)/d, where xe2x80x9clxe2x80x9d is the total length of all the segments of the inductor, xe2x80x9cwxe2x80x9d is the width of a segment of the inductor, and xe2x80x9cdxe2x80x9d is the distance between the metal level the inductor is patterned in and the silicon substrate or the next lower metal level of the chip.
In our exemplary transformer shown in FIGS. 1A and 1B, the capacitance of primary winding 104 can be decreased by either decreasing width 114 of primary winding 104 or increasing the distance between the metal level the inductor is patterned in and the silicon substrate. However, by decreasing width 114 of primary winding 104 in an attempt to decrease the capacitance of primary winding 104, the resistance of primary winding 104 is increased. Since the quality factor of an inductor, such as primary winding 104, is inversely proportional to its resistance, increasing the resistance of primary winding 104 decreases its quality factor. Therefore, decreasing width 114 of primary winding 104 is not an effective method of reducing the capacitance of primary winding 104.
Another problem that significantly affects the design of the exemplary transformer shown in FIGS. 1A and 1B is a very low coupling coefficient between the primary and secondary windings of the transformer. By way of background, in a transformer with two cross-coupled inductors, i.e. two windings, the coupling coefficient of the transformer is related to the percentage of the magnetic field created by one of the windings that flows through, i.e. that is coupled to, the other winding. Therefore, a coupling coefficient of xe2x80x9c1.0xe2x80x9d means that all of the magnetic field generated by the primary winding flows through, or is coupled to, the secondary winding. It is known in the art that a maximum coefficient of coupling of only about 60% is possible for on-chip transformers with both the primary and secondary windings patterned in the same metal level of the chip. The reason is that a significant portion of the magnetic field generated by each of the windings does not intersect the area occupied by the opposite winding.
Instead of the on-chip transformer discussed above, another type of transformer that could potentially be used is a discrete off-chip transformer. However, a discrete off chip transformer also suffers from various disadvantages. The off-chip transformer requires relatively long off-chip wires and interconnect lines to connect the transformer terminals to on-chip devices. The relatively long off-chip wires and interconnect lines result in added and unwanted resistance, capacitance, and inductance. Energy would be lost due to this unwanted resistance, capacitance, and inductance. Additionally, the interconnects for off-chip transformers are subject to long-term damage from vibration, corrosion, chemical contamination, oxidation, and other chemical and physical forces. Exposure to vibration, corrosion, chemical contamination, oxidation, and other chemical and physical forces results in lower long-term reliability for off-chip transformers.
The off-chip transformer also requires assembly of at least two components, i.e. the chip itself and the off-chip transformer. The required assembly of two or more components introduces corresponding reliability issues and also results in a greater manufacturing cost.
Thus, there is a need in the art for a transformer that has a small size, very low capacitance, high quality factor and high self-resonance frequency, a high coupling coefficient, and which is reliable, cost-effective, and which does not require connections through off-chip wires or interconnect lines.
The present invention is directed to improved transformer comprising stacked inductors. The present invention discloses a transformer that is cost effective to fabricate, since the fabrication can easily fit into process well known in the art, such as bumping technology and flip-chip technology. The present invention does not require independent fabrication or assembly, as required by off-chip transformers.
In one embodiment, the present invention comprises a first inductor fabricated over a first bond pad. For example, the first inductor can comprise copper, aluminum, aluminum-copper alloy, or gold. Also, by way of example, the first bond pad can comprise copper, aluminum, aluminum-copper alloy, or gold. The invention""s first inductor is electrically connected to the first bond pad. The invention further comprises a dielectric deposited over the first inductor. For example, the dielectric can comprise BCB or a low-k polyimide. The invention further comprises a second inductor fabricated over the dielectric. For example, the second inductor can comprise copper, aluminum, aluminum-copper alloy, or gold. In one embodiment, the invention can include a package encapsulating the first inductor, the dielectric, and the second inductor.
As described in the detailed description herein, the transformer of the present invention is fabricated over a semiconductor die, with very low unwanted capacitance, resulting in a high quality factor, high self-resonance frequency, and high coupling coefficient of the transformer""s cross-coupled inductors.